Abstract
Abstract Programmable logic is emerging as an attractive solution for many digital image processing applications. As image sizes and bit depths grow larger, software has become less useful in the image processing, Field Programmable Gate Array (FPGA) technology has become a viable target for the implementation of algorithms suited to image processing applications, the unique architecture of the FPGA has allowed the technology to be used in many such applications encompassing all aspects of image processing. Image smoothing is one of image processing applications, it often done to reduce the effect of pixel noise in images. This paper presents VHDL architectures (that allow description of the structure design of FPGA) to implement two of image smoothing filters: a) averaging filters b) median filters This research is also applying the filters on FPGA. The results proves high-speed performance of the algorithms that rely on hardware and software compared to software alone, as it appeared very big difference in the speed of execution, depending on the hardware devices that showed the speed of the implementation of the scale of nanosecond, while the software application of algorithms is measured in seconds. The software was implemented in this research using MATLAB 2010 language code as well as the VHDL language to deal with use of FPGA device, which was of a kind (Xilinx XC3S500E Spartan-3E).
